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irq.h (2443B)

      1 #ifndef PC_IRQ_IRQ_H
      2 #define PC_IRQ_IRQ_H
      3 
      4 #define PORT_PIC_MAITRE_COMMANDE  0x0020
      5 #define PORT_PIC_MAITRE_DONNEES   0x0021
      6 #define PORT_PIC_ESCLAVE_COMMANDE 0x00A0
      7 #define PORT_PIC_ESCLAVE_DONNEES  0x00A1
      8 
      9 /* 8259A page 10-12 (fig 7) */
     10 typedef enum {
     11 	PIC_ICW1_SEUL    = 1,
     12 	PIC_ICW1_CASCADE = 0
     13 } PIC_ICW1_SNGL;
     14 
     15 typedef enum {
     16 	PIC_ICW1_INTERVALLE_4 = 1,
     17 	PIC_ICW1_INTERVALLE_8 = 0
     18 } PIC_ICW1_ADI;
     19 
     20 typedef enum {
     21 	PIC_ICW1_LEVEL_TRIGGERED_MODE = 1,
     22 	PIC_ICW1_EDGE_TRIGGERED_MODE  = 0
     23 } PIC_ICW1_LTIM;
     24 
     25 typedef struct PicICW1 {
     26 	bool ICW4_present:1;
     27 	PIC_ICW1_SNGL single:1;
     28 	PIC_ICW1_ADI  adi:1;
     29 	PIC_ICW1_LTIM ltim:1;
     30 	uint8 init:1;
     31 	/* MCS-80/85 seulement :
     32 	 * uint8 adresseVecteurInterruption_7_5:3; */
     33 	uint8 _zero:4;
     34 } PicICW1;
     35 
     36 
     37 typedef struct PicICW2 {
     38 	/* MCS-80/85 seulement :
     39 	 * uint8 adresseVecteurInterruption_15_8; */
     40 	uint8 _zero:3;
     41 	uint8 adresseVecteurInterruption_7_3:5;
     42 } PicICW2;
     43 /* typedef uint8 PicICW2; */
     44 
     45 
     46 #define ESCLAVE_CONNECTE_SUR_MAITRE_PATTE(patteConnexionMaitre) (1<<(patteConnexionMaitre))
     47 typedef uint8 PicICW3_Maitre;
     48 
     49 typedef struct PicICW3_Esclave {
     50 	uint8 patteConnexionMaitre:3;
     51 	uint8 _zero:5;
     52 } PicICW3_Esclave;
     53 
     54 
     55 typedef enum {
     56 	PIC_ICW4_MODE_8086_8088 = 1,
     57 	PIC_ICW4_MODE_MCS_80_85 = 0
     58 } PIC_ICW4_MICRO_PM;
     59 
     60 typedef enum {
     61 	PIC_ICW4_MODE_SANS_TAMPON = (0 | 0),
     62 	PIC_ICW4_TAMPON_ESCLAVE   = (2 | 0),
     63 	PIC_ICW4_TAMPON_MAITRE    = (2 | 1)
     64 } PIC_ICW4_BUF_MS;
     65 
     66 typedef struct PicICW4 {
     67 	PIC_ICW4_MICRO_PM microPM:1;
     68 	bool autoEOI:1;
     69 	PIC_ICW4_BUF_MS tampon:2;
     70 	bool specialFullyNestedMode:1;
     71 	uint8 _zero:3;
     72 } PicICW4;
     73 
     74 
     75 typedef void (*FonctionEnvoiFinInterruption) ();
     76 typedef void (*GestionnaireRequeteInterruption) ();
     77 
     78 typedef struct EtatIrq {
     79 	FonctionEnvoiFinInterruption* tableFonctionsEnvoiFinInterruption;
     80 	GestionnaireRequeteInterruption* tableGestionnairesRequeteInterruption;
     81 	
     82 	uint8 adresseVecteurInterruptionMaitre;
     83 	uint8 adresseVecteurInterruptionEsclave;
     84 	
     85 	PicICW1 ICW1_Maitre;
     86 	PicICW2 ICW2_Maitre;
     87 	PicICW3_Maitre ICW3_Maitre;
     88 	PicICW4 ICW4_Maitre;
     89 	
     90 	PicICW1 ICW1_Esclave;
     91 	PicICW2 ICW2_Esclave;
     92 	PicICW3_Esclave ICW3_Esclave;
     93 	PicICW4 ICW4_Esclave;
     94 	
     95 	uint8 masqueMaitre;
     96 	uint8 masqueEsclave;
     97 	
     98 	uint8 ancienMasqueMaitre;
     99 	uint8 ancienMasqueEsclave;
    100 } EtatIrq;
    101 
    102 
    103 void definirGestionnaireRequeteInterruption(int ligne, GestionnaireRequeteInterruption gestionnaire);
    104 void activerLigneRequeteInterruption(int ligne);
    105 void desactiverLigneRequeteInterruption(int ligne);
    106 
    107 #endif